Eecs:1100 Digital Logic Design Final Examination Eith Answers - Dr. Anthony D. Johnson, The University Of Toledo Page 7
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8The University of Toledo
f15fs_dild7.fm - 7
EECS:1100 Digital Logic Design
Dr. Anthony D. Johnson
Student
name
______________________________________
00
y
y
1
2
00
01
10
11
X=0
A
0
00/0
10/0
00/0
01/1
0
A
1
01/1
11/1
11/1
11/1
1
Y
Y
/X
01
1
2
X=1
(a)
11
10
0
1
A
X=1
X=0
y
y
Y
Y
D
D
X
+
A
Q
Q
D
1
2
1
2
1
2
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
A
A
0
1
1
0
1
0
1
0
0
0
1
1
0
0
0
0
0
0
0
0
1
0
1
1
1
Figure 3.1(b) repeted.
1
0
1
0
1
0
1
1
(b)
1
0
1
0
1
1
0
0
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
0
y
y
y
2
2
0
1
2
0
1
0
1
1
1
1
1
1
Ay
1
1
1
Ay
Ay
1
1
1
00
1
00
00
(c)
1
1
01
01
01
1
1
1
1
1
1
D
=
y
y
+ y
A
11
11
11
1
1
2
1
D
=
y
y
+ A
2
1
2
10
1
10
1
1
10
1
1
X =
y
y
+ A
1
2
X- Kmap
D
- Kmap
D
- Kmap
2
1
(d)
(e)
State transition table of the SM
D-type flip-flop
Figure 3.2 State Machine design process. (a)
. (b)
excitation table
State transition excitation table of the SM. (d)Karnaugh map of the function
. (c)
D. (e)Minimum number of literals expression of the logic function D.
3.2 In the space reserved for Figure 3.2(b) fill in the contents of the D-type flip-flop excitation table.
2
3.3 Combining the information from the state transition table and the flip-flop excitation table
3
compose the state transition excitation table of the SM. Show the composed table in the space
reserved for Figure 3.2(c)
3.4 In the space reserved for Figure 3.2(d) prepare the Karnaugh map representation of the flip-flop
2
excitation function(s) found in the state transition excitation table.
3.5 Using the constructed Karnaugh map, derive the minimum number of literals expression of the
2
flip-flop excitation function(s), and enter the derived expression in the space reserved for Figure
3.2(e).
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