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Eecs:1100 Digital Logic Design Final Examination Eith Answers - Dr. Anthony D. Johnson, The University Of Toledo Page 3

The University of Toledo

f15fs_dild7.fm - 3

EECS:1100 Digital Logic Design

Dr. Anthony D. Johnson

Student

name

______________________________________

1.2 Apply the Karnaugh map minimization method to derive the Minimum number of literals

sum-of-products (SOP) representation of the function F

. Show the derived algebraic

representation in the space reserved for Figure 1-1(b).

1.3 Apply the Karnaugh map minimization method to derive the Minimum number of literals

product-of-sums (POS) representation of the function F

. Show the derived algebraic

representation in the space reserved for Figure 1-1(d).

1.4 In the space reserved for Figure 1-2(a), prepare a logic circuit diagram of the two-level

NAND-NAND form of implementation of the derived minimum number of literals SOP expression

of the function F

1.5 In the space reserved for Figure 1-2(b), prepare a logic circuit diagram of the two-level NOR-NOR

form of implementation of the derived minimum number of literals POS expression of the function

(a)

(b)

Figure 1-2 Two-level implementation of the minimum number of literals expressions of the functions F

and

. (a) NAND-NAND implementation of F

. (b) NOR-NOR implementation of F

Eecs:1100 Digital Logic Design Final Examination Eith Answers - Dr. Anthony D. Johnson, The University Of Toledo Page 3